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Abstract High quality dielectric‐semiconductor interfaces are critical for reliable high‐performance transistors. This paper reports the in situ metal–organic chemical vapor deposition of Al₂O₃on β‐Ga₂O₃as a potentially better alternative to the most commonly used atomic layer deposition (ALD). The growth of Al₂O₃is performed in the same reactor as Ga₂O₃using trimethylaluminum and O₂as precursors without breaking the vacuum at a growth temperature of 600 °C. The fast and slow near interface traps at the Al₂O₃/β‐Ga₂O₃interface are identified and quantified using stressed capacitance–voltage (CV) measurements on metal oxide semiconductor capacitor (MOSCAP) structures. The density of shallow and deep level initially filled traps (D_it) are measured using ultraviolet‐assisted CV technique. The average D_itfor the MOSCAP is determined to be 6.4×10¹¹cm⁻²eV⁻¹. The conduction band offset of the Al₂O₃/ Ga₂O₃interface is also determined from CV measurements and found out to be 1.7 eV which is in close agreement with the existing literature reports of ALD Al₂O₃/Ga₂O₃interface. The current–voltage characteristics are also analyzed and the average breakdown field is extracted to be approximately 5.8 MV cm⁻¹. This in situ Al₂O₃dielectric on β‐Ga₂O₃with improved dielectric properties can enable Ga₂O₃‐based high‐performance devices. 

Abstract Recent advances in device design and process optimizations have enabled the production of CdTe devices on flexible substrates, but the necessary high‐temperature processing (>450 °C) to recrystallize grains limits the use of alternative lightweight substrates. Here, a new synthesis method is reported to create a freestanding CdS/CdTe film by combining high‐temperature depositions (CdS/CdTe on Si/SiO₂) and a simple lift‐off process in a water environment at room temperature. Analysis of the results indicate that the delamination is facilitated by the innate lattice mismatch as well as the presence of an unexpected Te‐rich layer (≈20 nm), which accumulates on the SiO₂surface. High‐resolution electron microscopy and spectroscopy measurements confirm that the CdS/CdTe film is physically liberated from the substrate without leaving any residue, while also preserving their initial structural and compositional properties. 

Abstract Leading photovoltaic technologies such as multicrystalline Si, CdTe, Cu(In,Ga)Se₂, and lead halide perovskites are polycrystalline, yet achieve relatively high performance. At the moment polycrystalline photovoltaic technologies stand at a juncture where further advances in device performance and reliability necessitate additional characterization and modeling to include nanoscale property variations. Properties and implications of grain boundaries are previously studied, yet chemistry variations along individual grain boundaries and its implications are not yet fully explored. Here, the effects of bromine etching of CdTe absorber layers on the nanoscale chemistry are reported. Bromine etching is commonly used for improving CdTe back contacts, yet it removes both cadmium and chlorine along grain boundaries to depths closer to 1 µm. 2D device simulations reveal these composition modifications limit photovoltaic performance. Since grain boundaries and their intersections with surfaces and interfaces are universal to thin film photovoltaics, these findings call for similar studies in each of the photovoltaic technologies to further enable advances.